Sponsored by the European Space Agency, the Occamy processor, developed by researchers at ETH Zurich and the University of Bologna, has been taped out, according to foreign media reports. The chip uses two sets of 32-bit 216-core RISC-V architecture chiplets, plus an unknown number of 64-bit floating point units (FPUs), and two 16GB HBM2e memories from Micron Technology.
The report pointed out that the cores of this processor are interconnected through an intermediary layer, and the dual CPU can provide 0.75 FP64 TFLOPS computing performance and 6 FP8 TFLOPS computing power. However, neither the European Space Agency nor its development partners disclosed Occamy’s power consumption. However, it is rumored that the chip uses passive cooling, which means that this is a low-power processor.
The use of small chip design is one of the advantages of this chip, because it can be used to add small chips with other functions in subsequent packages to improve certain working capabilities when necessary. Each Occamy chip has 216 RISC-V cores and an FPU for floating-point operations. A total of about 1 billion transistors are distributed on this 73mm² chip, using GlobalFoundries’ 12-nanometer low-power number process to build.
For comparison, Intel’s Alder Lake chip size is 163 mm², the report said. In terms of performance, Huida’s A30 GPU has 24GB HBM2 display memory, which can provide 5.2 FP64/10.3 FP64 Tensor TFLOPS and 330/660 INT8 TOPS. Additionally, the Occamy CPU is primarily part of the European Space Agency’s EuPilot program, one of many chip options the agency is considering for aerospace computing. Currently, Occamy’s tests show that simulation operations can be performed on the fpga, which has also been tested on two AMD Xilinx Virtex UltraScale+ HBM FPGAs and a Virtex UltraScale+ VCU1525 FPGA.
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