Cadence, a giant in electronic design innovation, announced the industry’s first GDDR7 verification solution, enabling IC designers to print a single chip to simulate and verify their GDDR7 designs. The development of GDDR7 faces the challenges of extremely high speed and advanced functions , it is believed that the target speed of GDDR7 reaches 36000MT/s and uses more advanced signal transmission technology.
Cadence GDDR7 VIP supports all modes and new features in the JEDEC specification, including three levels of PAM3 through real intelligent simulation.
For UI simulation, Cadence VIP adopts three solutions of binary bus, strength modeling and real number modeling.
Cadence GDDR7 VIP can be integrated in various environments, such as Verilog, SV-UVM and systemC, through a complete set of protocol checkers and reconfigurable timers to verify compliance with the protocol, and also integrates a waveform debugger to accelerate visually Test process.
source
Further reading: