News on August 26th, a few days ago, the second RISC-V China Summit Beijing venue series of activities “The First Beijing Open Source Chip Ecological Industry Forum” was officially held. According to Bao Yungang, deputy director of the Institute of Computing Technology of the Chinese Academy of Sciences, the development of Xiangshan’s open source high-performance RISC-V processor core has ushered in another milestone.
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At the forum, the Institute of Computing Technology of the Chinese Academy of Sciences, the Beijing Open Source Chip Research Institute, Tencent, Ali, ZTE, Thundersoft, Yi Siwei, and Shuneng formed a joint R&D team.To carry out the joint development of the third-generation Fragrant Hills (Kunming Lake Architecture).
Bao Yungang pointed out that the formation of the Xiangshan joint team marks that Xiangshan and its open source model have been initially recognized by the industry, and have taken a key step in crossing the valley of death from “prototype to product”. This is only the first step, and there will be many challenges and difficulties in the future, but we are also ready to meet all kinds of challenges.
It is reported that,The first-generation core of “Xiangshan” “Yanqi Lake” was taped out on July 15 last year, based on the 28nm process,The die area is 6.6 square millimeters, the single-core L2 cache is 1MB, and the estimated power consumption is 5W. The second-generation core “Nanhu” target is 14nm 2GHz.
It is worth mentioning that Ni Guangnan, an academician of the Chinese Academy of Engineering, pointed out that the current CPU market is mainly monopolized by the x86 and Arm architectures.And China wants to break this situation and achieve independent and controllable, open source RISC-V architecture will be a great opportunity and development direction.
In the future mainstream CPU architecture in the world, the RISC-V architecture is expected to reach one third of the world.
